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Thread Level Speculation (TLS), also known as Speculative Multi-threading, or Speculative Parallelization,[1] is a technique to speculatively execute a section of computer code that is anticipated to be executed later in parallel with the normal execution on a separate independent thread. Such a speculative thread may need to make assumptions about the values of input variables. If these prove to be invalid, then the portions of the speculative thread that rely on these input variables will need to be discarded and squashed. If the assumptions are correct the program can complete in a shorter time provided the thread was able to be scheduled efficiently.

Description

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TLS extracts threads from serial code and executes them speculatively in parallel with a safe thread. The speculative thread will need to be discarded or re-run if its presumptions on the input state prove to be invalid. It is a dynamic (runtime) parallelization technique that can uncover parallelism that static (compile-time) parallelization techniques may fail to exploit because at compile time thread independence cannot be guaranteed. For the technique to achieve the goal of reducing overall execute time, there must be available CPU resource that can be efficiently executed in parallel with the main safe thread.[2]

TLS assumes optimistically that a given portion of code (generally loops) can be safely executed in parallel. To do so, it divides the iteration space into chunks that are executed in parallel by different threads. A hardware or software monitor ensures that sequential semantics are kept (in other words, that the execution progresses as if the loop were executing sequentially). If a dependence violation appears, the speculative framework may choose to stop the entire parallel execution and restart it; to stop and restart the offending threads and all their successors, in order to be fed with correct data; or to stop exclusively the offending thread and its successors that have consumed incorrect data from it.[3]

References

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  1. ^ Estebanez, Alvaro (2017). "A Survey on Thread-Level Speculation Techniques". ACM Computing Surveys. 49 (2): 1–39. doi:10.1145/2938369. S2CID 423292.
  2. ^ Martínez, José F.; Torrellas, Josep (2002). "Speculative synchronization" (PDF). Proceedings of the 10th international conference on architectural support for programming languages and operating systems (ASPLOS-X) - ASPLOS '02. ACM. p. 18. doi:10.1145/605397.605400. ISBN 1581135742. S2CID 9189828. Archived from the original (PDF) on 2018-11-18.
  3. ^ García Yaguez, Alvaro (2014). "Squashing Alternatives for Software-based Speculative Parallelization". IEEE Transactions on Computers. 63 (7): 1826–1839. Bibcode:2014ITCmp..63.1826G. doi:10.1109/TC.2013.46. S2CID 14081801.

Further reading

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