A content-addressable parallel processor (CAPP) a.k.a. in Flynn's 1972 taxonomy as an associative processor[1] is a type of parallel processor which uses content-addressing memory (CAM) principles. CAPPs are intended for bulk computation. The syntactic structure of their computing algorithm are simple, whereas the number of concurrent processes may be very large, only limited by the number of locations in the CAM. The best-known CAPP may be STARAN, completed in 1972; several similar systems were later built in other countries.

A CAPP is distinctly different from a Von Neumann architecture or classical computer that stores data in cells addressed individually by numeric address. The CAPP executes a stream of instructions that address memory based on the content (stored values) of the memory cells. As a parallel processor, it acts on all of the cells containing that content at once. The content of all matching cells can be changed simultaneously.

A typical CAPP might consist of an array of content-addressable memory of fixed word length, a sequential instruction store, and a general purpose computer of the Von Neumann architecture that is used to interface peripherals.

References

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  • Kent, Allen (1990), Encyclopedia of microcomputers: Volume 4 - Computer-Related Applications: Computational Linguistics to dBase, New York: Dekker, pp. 138–139, ISBN 0-8247-2703-7
  • Foster, Caxton C (1976), Content Addressable Parallel Processors, Van Nostrand Reinhold, ISBN 0-442-22433-8
  1. ^ "associative processor". Retrieved 2021-03-14.


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